1. Field of the Invention
The present invention generally relates to semiconductor chip manufacturing, and more particularly to a method for calibrating an optical proximity correction model used for printing a circuit pattern on a semiconductor wafer.
2. Description of the Related Art
Calibration of lithographic process models for simulating images are used in the process of designing masks for use in the manufacture of integrated circuits, for example, in Optical Proximity Correction (OPC) or mask verification procedures has required an increasing number of measurements as the critical dimension tolerances have gotten smaller. The model calibration process may use a combination of image parameters such as slope, Imax, Imin and curvature based on optical parameters as well as perhaps 10 or more density kernels for the resist model.
Calibration against measurement of two dimensional features have been increasing at a faster rate than of features with one dimensional character as the technologies require better accuracy in the lithographic process models for line-end pull-back and corner rounding and for avoiding catastrophic failure which mostly occur due to the non-linearity of processes for two dimensional design structures. However, such measurements of calibration data have typically been performed without a systematic method for determining whether such measurements will contribute to improving the quality of the model predictive capability, and there has been a proliferation of calibration measurement sites without a corresponding improvement in model quality.
Optical Proximity Correction (OPC) uses calibrated optical and resist models to modify the shapes on the mask so that the printed shapes on the wafer will closely match the desired target shapes, within acceptable criteria. OPC optical and resist models are developed through an empirical method using a model calibration process in which test structures (also called calibration structures), that are intended to be a representative set of the actual product patterns, are placed on a test mask. Thus, the calibration test patterns consist of features that have dimensions that are desired to be printed on the wafer. The test mask is then exposed and the wafer image is measured and used as input in the model calibration and building process.
FIG. 1 illustrates a typical lithographic process model calibration procedure according the current art. A lithographic process model, for example, such as a resist model which is intended to predict the threshold image intensity at which a latent image will be formed in the resist, may be expressed as a function of combinations of optical image characteristics, such as Imax, Imin, slope, curvature, and various density kernels, as known in the art. The values of the optical image characteristics are typically obtained from an optical model, such as a Sum of Coherent Systems approximation (SOCS approximation) of the Hopkins integral for describing the optical imaging process. The optical image parameters are then incorporated into a lithographic process model that is used to predict the transferred latent or printed image on a wafer. For example, the lithographic process model for simulating the latent or developed resist and/or etched image may be a polynomial function of such optical image characteristic variables, having coefficients that need to be calibrated.
Calibration test patterns are provided, having measurement test sites at which to compare simulated to printed pattern characteristics, such as critical dimension (CD), edge placement error or other geometric characteristics (Block 101). The calibration test patterns contain features having dimensions and spacings (or pitch) that are systematically varied according to the dimensions and spacings that are expected to occur in the actual circuit design layout. The calibration patterns are transferred to a wafer using the lithographic process that is to be modeled (Block 102). Measurements of the various image characteristics of the transferred calibration pattern at the measurement sites are taken (Block 103). Typically, geometric image characteristics are measured, such as CD, pitch, spacing, edge placement error, and the like.
Next, the lithographic process model coefficients are determined so that the simulated image produced by the lithographic process model adequately predicts the transferred image, within predetermined tolerances or accuracy criteria (Block 104). The process model is calibrated by examining the differences in the simulated images to the measured data obtained from printed images of the calibration test patterns at the measurement test sites. Appropriate adjustments to the process model are made until the differences or “errors” in the predetermined image parameters between the simulated images and the corresponding parameters measured on printed calibration images satisfy certain error metrics or tolerances. This may be done by any suitable method known in the art, such as least squares fitting, and the like.
The resulting final (calibrated) process model (Block 105), typically containing calibrated coefficients in the case of a polynomial model, may be used in the design process with a certain degree of confidence that the simulated mask images will accurately predict the printed images, at least to the extent that the calibration patterns accurately represent the range of patterns that are actually found in the integrated circuit patterns to be manufactured.
Calibration patterns may not represent all pattern variations that occur in the actual circuit layout. For example, referring to FIG. 2A, a calibrated model may provide a simulated contour 211 that matches the target shape 201, within a predetermined tolerance. However, referring to FIG. 2B, the actual printed image 202 has a failure point 205 that was not accurately predicted by the model. One reason for this predictive failure can be seen with reference to FIG. 2C, which illustrates a three-dimensional plot of image parameter space that may comprise a typical process model. In this example, the image parameter space is defined by three image characteristics, specifically, Imax plotted along axis 111, Imin plotted along axis 112, and curvature plotted along axis 113. The calibration image data covers the image parameter space approximately indicated by the region 220. However, the failure point 205 occurs in the image parameter space outside of the region of calibration data 220, thus the process model did not accurately predict the pinched off feature at the failure point 205 in FIG. 2C.
In current calibration methods, new calibration structures are constantly added to existing calibration structures from previous banks of knowledge as new problem areas are found. There is typically no systematic approach to adding or subtracting calibration structures that accounts for whether the parameter space will be adequately covered by the calibration patterns.
In view of the foregoing considerations, there is a need for a calibration method to more reliably ensure that a process model will accurately predict the full range of image characteristics found in the actual circuit layout during the mask design process, for example, in OPC or mask verification methodologies.